Reading List for In-Network Computing
Switch Hardware
- [SIGCOMM'13] Forwarding metamorphosis: fast programmable match-action processing in hardware for SDN [link]
- [SIGCOMM'17] dRMT: disaggregated programmable switching [link]
- [ISCA'21] A RISC-V in-network accelerator for flexible high-performance low-power packet processing [link]
- [SIGCOMM'22] Programmable multi-dimensional table filters for line rate network functions [link]
- [ASPLOS'22] Taurus: a data plane architecture for per-packet ML [link]
- [NSDI'22] Isolation mechanisms for high-speed packet-processing pipelines [link]
- [NSDI'22] Runtime programmable switches [link]
NICs
Programming Languages and Compilers
- [NSDI'15] Compiling packet programs to reconfigurable switches [link]
- [SIGCOMM'16] Packet transactions: high-level programming for line-rate switches [link]
- [SIGCOMM'20] Switch code generation using program synthesis [link]
- [arXiv'22] High-level synthesis for packet-processing pipelines [link]
Applications
- [SC'21] Flare: flexible in-network allreduce [link]
- [VLDB'21] In-network support for transaction triaging [link]